Ethernet debugging
1. Ethernet Foundation
Hardware framework
MII interface
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What is the MII interface
Standard interface between MAC and PHY
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MII data pin definition
Data transmission interface from MAC layer to PHY layer
Receiving data interface from PHY layer to MAC layer
Status indication signal from PHY layer to MAC layer
MDIO interface for transmitting control and status information from MAC layer to PHY layer
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MII interface classification
| Interface type | Number of lines | Clock | Network speed | describe |
|---|---|---|---|---|
| MII | Line 14 | 2.5Mhz (10MHz), 25Mhz (100MHz) | Support 10M and 100M | standard interface |
| RMII | Line 7 | 5Mhz (10MHz), 50Mhz (100MHz) | Support 10M and 100M | Simplified MII |
| GMII | 125MHz (Gigabit) | Support 10M, 100M and 1000M | Gigabit MII | |
| RGMII | 125MHz (Gigabit) | Support 10M, 100M and 1000M | Simplified GMII | |
| SMII | 4 lines | 125MHz (100m) | Support 10M and 100M | Cisco standard, serial |
| SGMII | Support 10M, 100M and 1000M | Cisco standard, serial |
PHY chip
-
PHY chip function
Convert the serial digital signal sent by MAC terminal into parallel analog signal received by network cable terminal
Convert the parallel analog signal sent by the network cable end into the serial digital signal received by the MAC end
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Integration mode of PHY chip
Integrated PHY chip
External PHY chip
-
Type of PHY chip
100m PYH chip
Gigabit PYH chip
Isolation transformer
-
Isolation transformer action
Protect PYH chip
RJ45 interface
-
Standard crystal head wire sequence type
T568A: green white green orange white blue blue white orange brown white brown
T568B: orange white orange green white blue blue white green brown white brown
DWMAC
Official MAC driver, supporting many platforms
Rk3568 Android 11 uses DWMAC driver
2. Platform configuration
2.1. Ruixin micro platform
Drive directory
| Platform system | Kernel version | Drive directory |
|---|---|---|
| RK3568 Android11.0 | Linux4.19 | kernel/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c |
| RK3399 Android8.1 | Linux4.4 | kernel/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c |
| RK3288 Android5.1 | Linux3.10 | kernel/drivers/net/ethernet/rockchip/gmac/ |
Kernel configuration
-
PHY configuration
> Device Drivers > Network device support > PHY Device support and infrastructure > Driver for Rockchip Ethernet PHYs
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MAC configuration
> Device Drivers > Network device support > Ethernet driver support > STMicroelectronics devices > STMicroelectronics 10/100/1000/EQOS Ethernet driver > STMMAC Platform bus support > Rockchip dwmac support
DTS configuration
-
Reference example of DTS configuration of each platform
Reference document < rk DTS reference example of each platform pdf>
-
Detailed description of DTS parameters
&gmac {
phy-supply = <&vcc_phy>; //PHY power supply configuration
snps,reset-gpio = <&gpio2 15 GPIO_ACTIVE_LOW>; //PHY reset pin
snps,reset-active-low; //PHY reset pin low active
snps,reset-delays-us = <0 10000 50000>; //Delay 0ms before resetting PYH, keep 10ms when pulling down, and 50ms when pulling up
assigned-clocks = <&cru SCLK_MAC>; //MAC clock source
assigned-clock-parents = <&ext_gmac>; //MAC parent clock source
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>; //RGMII pin pinctrl configuration
tx_delay = <0x30>;
rx_delay = <0x10>;
status = "okay";
};
/ {
ext_gmac: external-gmac-clock {
compatible = "fixed-clock"; //Indicates that this is a fixed clock (input by external PHY)
clock-frequency = <125000000>; //The default is 125M
clock-output-names = "ext_gmac";
#clock-cells = <0>;
};
vcc_phy: vcc-phy-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 25 GPIO_ACTIVE_HIGH>; //GPIO controlling LDO switch
pinctrl-names = "default";
pinctrl-0 = <ð_phy_pwr>; //Set IOMUX for GPIO
regulator-name = "vcc_phy";
regulator-always-on;
regulator-boot-on;
};
};
- Gigabit Network DTS configuration
&gmac_clkin {
clock-frequency = <125000000>; //Modified to 125M clock frequency
};
&gmac {
reset-gpio = <&gpio4 GPIO_B0 GPIO_ACTIVE_LOW>;
phy-mode = "rgmii"; //Modified to rgmii gigabit network card
clock_in_out = "input"; //Modify it to input, that is, the 125M clock is provided by PHY
tx_delay = <0x30>;
rx_delay = <0x10>;
};
- 100m DTS configuration
&gmac_clkin {
clock-frequency = <50000000>; //Modified to 50M clock frequency
};
&gmac {
reset-gpio = <&gpio4 GPIO_B0 GPIO_ACTIVE_LOW>;
phy-mode = "rmii"; //Modified to rmii 100m network card
clock_in_out = "output"; //It is modified to output, that is, the clock is provided by the RK master
tx_delay = <0x30>;
rx_delay = <0x10>;
};
2.2 Quanzhi platform
2.3. Amlogic platform
3. USB Ethernet card
Kernel configuration
Many USB Ethernet cards are configured by default
> Device Drivers > Network device support > USB Network Adapters
4. Debugging skills
4.1 network setting skills
Enable / disable network card
$ ifconfig eth0 down //Turn off the network card $ ifconfig eth0 up //Enable network card
Set IP address, subnet mask and broadcast address
$ ifconfig eth0 192.168.1.45 //Set IP address $ ifconfig eth0 192.168.1.45 netmask 255.255.255.0 //Set IP address and subnet mask $ ifconfig eth0 192.168.1.45 netmask 255.255.255.0 broadcast 192.168.1.255 //Set IP address, subnet mask and broadcast address
Set gateway
$ route add default gw 192.168.1.1
Set DNS
Burn Ethernet MAC address
-
Get MAC address command
$ cat /sys/class/net/eth0/address //Ethernet MAC address $ cat /sys/class/net/wlan0/address //WIFI MAC address
-
Four acquisition methods of MAC address
- IDB stored in NAND
- Stored in EEPROM
- Use the WIFI MAC address as the Ethernet MAC address
- The MAC address is generated randomly each time the machine is powered on
4.2 function debugging skills
View Ethernet interrupts
$ cat /proc/interrupts | grep eth eth0
View Ethernet clock frequency
$ cat /d/clk/clk_summary | grep mac
$ cat /sys/kernel/debug/clk/clk_summary | grep mac
enable prepare protect duty
clock count count count rate accuracy phase cycle
gmac1_clkin 0 0 0 125000000 0 0 50000
gmac0_clkin 0 0 0 125000000 0 0 50000
enable count must be 1 to indicate that the clock is enabled
ifconfig parameter parsing
$ ifconfig -a
eth0 Link encap:Ethernet HWaddr ca:72:c1:04:0f:0d Driver rk_gmac-dwmac
UP BROADCAST MULTICAST MTU:1500 Metric:1
RX packets:0 errors:0 dropped:0 overruns:0 frame:0
TX packets:0 errors:0 dropped:0 overruns:0 carrier:0
collisions:0 txqueuelen:1000
RX bytes:0 TX bytes:0
Interrupt:39
- Parameter description
eth0 Network card device name
Link encap Equipment type
HWaddr MAC address(Physical address)
Driver Device drive
inet addr IP address
Bcast gateway
Mask Mask address
inet6 addr IPv6 of IP address
Scope
UP Network card status: start
RUNNING Network cable connection succeeded
MULTICAST Support multicast
MTU Maximum transmission unit: 1500 bytes
RX Received packet details
TX Send packet details
packets accept/Number of packets sent
errors Number of error packets
dropped
overruns
frame
carrier
RX bytes Number of bytes of accepted data
TX bytes Number of data bytes sent
See if PHY is recognized
- The following node path is rk3399 android7 1. The node paths of other platforms can be modified by themselves
$ cat /sys/bus/mdio_bus/devices/stmmac-1\:00/phy_id 0X001cc916
View network cable connection status
- The following node path is rk3399 android7 1. The node paths of other platforms can be modified by themselves
$ cat /sys/devices/platform/e7a04000.gmac0/net/gmac0/carrier 0 Indicates that the network cable is not plugged in 1 Indicates a patch cord
Ethernet packet capture
- Function: analyze Ethernet data flow direction
$ tcpdump -i gmac0 -s 0 -w /data/gmac0.pcap
Configure IO drive strength
reference resources Detailed description of DTS parameters pinctrl configuration for
Gigabit network stability optimization
-
Reference document: RK3399Pro_Linux_SDK_Beta_v0.01\rk3399pro-v1.4\docs\Kernel\GMAC\Rockchip_Developer_Guide_Linux_GMAC_RGMII_Delayline_CN.pdf
-
Applicable to all RK platforms
-
Driver Directory: kernel / Drivers / net / Ethernet / STMicro / stmmac / dwmac rk tool c
Example: rk3568 Android 11 0
- Confirm that the following files exist under the ethernet node (fe2a0000 can be modified according to different platforms)
$ ls /sys/devices/platform/fe2a0000.ethernet/ mac_lb phy_lb phy_lb_scan rgmii_delayline
- Scan delayline window
$ cd /sys/devices/platform/fe2a0000.ethernet/ $ echo 1000 > phy_lb_scan ..... Find suitable tx_delay = 0x2d, rx_delay = 0x2c .... $ cd /sys/devices/platform/fe010000.ethernet/ $ echo 1000 > phy_lb_scan Find suitable tx_delay = 0x3a, rx_delay = 0x29
Ethernet forced 100m
Platform: rk3399pro Android 8 one
Problem: the speed of some boards in the Gigabit network is slow, and the speed is normal after being forcibly identified as a 100m network
-
resolvent
--- a/kernel/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/kernel/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -838,6 +838,8 @@ static int stmmac_init_phy(struct net_device *dev) priv->plat->phy_addr); pr_debug("stmmac_init_phy: trying to attach to %s\n", phy_id_fmt); + + interface = PHY_INTERFACE_MODE_RMII;//rpdzkj jeff phydev = phy_connect(dev, phy_id_fmt, &stmmac_adjust_link, interface); --
Displays Ethernet settings options
Platform: rk3566 Android 11 0
$ vim device/rockchip/common/BoardConfig.mk
# ethernet
BOARD_HS_ETHERNET ?= true
4.3 function test skills
Network function test
$ ping www.baidu.com $ ping 14.215.177.39 //Baidu's IP address $ ping 8.8.8.8 //IP address of Telecom
Network stability test
$ iperf
5. Ethernet process analysis
-
Load MAC controller driver
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Generate eth0 network node
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PHY chip initialization
Ensure that the 25MHz clock is normal (provided by external crystal oscillator or internal frequency division of CPU)
Ensure normal 3.3V power supply
-
PHY chip communicates with MAC controller
Ensure that RX/TX pin functions normally
Ensure that the 50MHz/125MHz clock is normal (provided by PHY or internal frequency division of CPU)
6. Frequently asked questions
Hardware troubleshooting
PHY chip
-
External 25MHz crystal oscillator
Only after 1.0V can the crystal oscillator have waveform
-
3.3V input
Externally provided
-
Internal 1.0V
DTS must enable GMAC to have 1.0V
-
125MHz clock output
The amplitude is about 0.8V-2.4V
After Ethernet communication fails, 125MHz clock output will be turned off
Ethernet clock
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Ethernet clock frequency requirements
100m network 50MHz
Gigabit Network 125MHz
-
Clock source selection
PHY provides input
SOC provides output
-
Clock voltage amplitude requirements
RK3399 Android8.1. Actual measurement: 0.8V-2.4V
GPIO multiplexing
-
Reset GPIO function multiplexing
If the GPIO configuration is not reset successfully, the PHY chip initialization will fail
-
Data GPIO function multiplexing
The data GPIO configuration was unsuccessful and the IP address could not be obtained
MAC controller driver loading failed
- Successfully loaded LOG
[ 1.618257] rk_gmac-dwmac fe300000.ethernet: clock input or output? (input). [ 1.618277] rk_gmac-dwmac fe300000.ethernet: TX delay(0x28). [ 1.618289] rk_gmac-dwmac fe300000.ethernet: RX delay(0x11). [ 1.618318] rk_gmac-dwmac fe300000.ethernet: integrated PHY? (no). [ 1.618475] rk_gmac-dwmac fe300000.ethernet: cannot get clock clk_mac_speed [ 1.618485] rk_gmac-dwmac fe300000.ethernet: clock input from PHY [ 1.623514] rk_gmac-dwmac fe300000.ethernet: init for RGMII [ 1.623630] stmmac - user ID: 0x10, Synopsys ID: 0x35 [ 1.623640] Ring mode enabled [ 1.623648] DMA HW capability register supported [ 1.623654] Normal descriptors [ 1.623664] RX Checksum Offload Engine supported (type 2) [ 1.623671] TX Checksum insertion supported [ 1.623677] Wake-Up On Lan supported [ 1.623715] Enable RX Mitigation via HW Watchdog Timer [ 1.692078] libphy: stmmac: probed [ 1.692131] eth%d: PHY ID 001cc915 at 0 IRQ POLL (stmmac-0:00) active [ 1.692143] eth%d: PHY ID 001cc915 at 1 IRQ POLL (stmmac-0:01)
- Cause analysis
- MAC driver exception
- Abnormal power supply of MAC controller
eth0 network node no generation
- Cause analysis
- Confirm whether the MAC controller driver is loaded normally
- When the eth0 node is generated, the MAC controller may not be loaded successfully
PHY initialization failed
-
Error LOG (similar to the following two error logs)
[ 27.717868] libphy: PHY stmmac-1:ffffffff not found [ 27.718020] rk_gmac-dwmac fe010000.ethernet eth0: Could not attach to PHY [ 27.718045] rk_gmac-dwmac fe010000.ethernet eth0: stmmac_open: Cannot attach to PHY (error: -19)
eth0: No PHY found
Note: after PHY initialization fails, the MAC clock will be turned off
-
PHY normal identification LOG
[ 27.813648] acc_open
[ 27.813679] acc_release
[ 27.842541] Generic PHY stmmac-1:00: attached PHY driver [Generic PHY] (mii_bus:phy_addr=stmmac-1:00, irq=POLL)
[ 27.858719] dwmac4: Master AXI performs any burst length
[ 27.859831] rk_gmac-dwmac fe010000.ethernet eth0: No Safety Features support found
[ 27.859893] rk_gmac-dwmac fe010000.ethernet eth0: IEEE 1588-2008 Advanced Timestamp supported
[ 27.866476] rk_gmac-dwmac fe010000.ethernet eth0: registered PTP clock
[ 27.871545] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
[ 9.813648] acc_open
[ 9.813679] acc_release
[ 10.007920] rk_gmac-dwmac fe300000.ethernet: rk_get_eth_addr: mac address: 82:d0:bf:06:40:6e
[ 10.007936] eth0: device MAC address 82:d0:bf:06:40:6e
> PHY Yes Android Loaded after system startup, i.e acc_open,acc_release After information printing * Cause analysis 1. Confirm whether the hardware circuit is connected 2. confirm PHY Whether the power supply is normal 3. Whether the clock is normal, amplitude 2 V above 4. Data pin multiplexing relationship 5. Confirm whether the reset pin is controlled 6. measure MAC Signal pin level, amplitude 3.3V 7. increase delay time ## DMA initialization failed * report errors LOG
stmmac_open: DMA initialization failed
* Cause analysis only clock_in_out = "input"It will occur when the clock is abnormal (it seems that it is not necessarily, which is generally caused by abnormal clock) 1. confirm PYH Whether the clock provided is normal (frequency, voltage amplitude) 2. IOMUX Is it normal ## Unrecognized network cable plugging * Cause analysis 1. Confirm the data pin multiplexing relationship 2. confirm PHY Is it working properly 3. measure MAC_CLK,RX_CLK,TX_CLK Pin signal 125 at Gigabit MHz，25 at 100 megabytes MHz，2 at 10 megabytes.5MHz ## RX data is 0/TX data is 0 * Problem description Under normal circumstances, even if it is not available IP Address, will also receive LAN broadcast packets * Cause analysis 1. Check hardware RX/TX Data path Whether the line is connected PHY Chip RJ45 Is the seat normal inspect RX Up and down 2. inspect IOMUX * resolvent Platform: RK3568 Android11 modify DTS Ethernet 125 MHz Clock configuration RX Change the pull-up to pull-down on the data ## RX has data, but they are all error packets * Cause analysis 1. 125MHz Whether the clock frequency meets the standard 2. Analyze line interference ## Failed to get IP address * Cause analysis 1. adjustment rx_delay,tx_delay 2. adjustment IO Driving strength 3. Try setting manually IP address ## Failed to connect to Internet domain name address * Cause analysis 1. add to DNS to configure ## Slow network speed * Problem description RK3568 Android11.0 GigE iperf3 The test bandwidth is only 125 M * Cause analysis 1. VDD10_EPHY The voltage ripple shall not exceed 100 mv 2. measure RX_CLK,TX_CLK,MAC_CLK，Ensure that the frequency and level are correct * resolvent use RK Provided iperf Tool test can reach 800 M(Windows of iperf yes Android of iperf) If used Ubuntu Server downloaded iperf Only 300 M ## High throughput and packet loss rate * Cause analysis 1. measure MAC Clock accuracy ## Some apps using Ethernet cannot access the Internet * Cause analysis APP Only recognize their own problems WIFI,Mobile network