Chapter 2 Cache and memory

This blog is a brief note of DPDK in simple terms 2.1 introduction to storage system For packet processing, there are mainly two parts (personal understanding), one is CPU The other is CPU Scheduling of instructions and data to be processed. How to give full play CPU On the basis of performance Cache´╝îMemory, SATA Disk, PCIe Devices (network ...

Posted by dbradbury on Mon, 08 Nov 2021 11:29:28 +0100